G144A12 Application Notes

We continually produce documents containing information of value to anyone using our chips. In the interest of placing useful information in your hands as soon as we can, some of this material is posted in informal form or as preliminary drafts of formal documents. We are also posting raw data from chip characterization and testing, so that the foundations of the specifications in our data sheets will be clear. Please contact our Hotline for any questions or comments regarding this content; if you wish to be informed of updates, please subscribe to the RSS feed on our blog.

Hardware Design

These items pertain to hardware application of our chips, including examples of PCB (Printed Circuit Board) layout.

Complete Systems

EVB001 Evaluation Board (Last updated 9/26/2011) With two GA144 chips and great flexibility, this board is slated to become the primary hardware and software development platform for GreenArrays chips. It will be the reference or target system used in most of the documents below.

PCB Examples

SRAM Development Board (Last updated 7/11/2011) A simple PCB that was used for initial development of the eForth and polyFORTH virtual machines based on external SRAM.

Lower Cost Experimentation

Breadboarding on a Budget is a page devoted to making our chips accessible to experimenters whose designs are at the interactive breadboarding stage or for any other reason not yet appropriate for PCB layout.

Programming

The topics in this section include design, construction, and testing of software for our chips.

arrayForth Tools

softsim (Last updated 4/07/2011) An F18 instruction level simulator for GreenArrays chips, using code you compile for ROM and/or RAM, and with provision for adding testbeds to simulate I/O.

Interactive Development Environment (IDE) (Last updated 4/05/2010) The primary tool for incrementally, interactively testing and debugging F18 code for one or more computers in vivo on real chips.

Design Exercises

These are application studies illustrating approaches to problem solving using our chips; some of these techniques might be useful in your designs. Complete source code is included.

Algorithms

AP-001: MD5 Hash (Last updated 9/17/2010)

Hardware/software Modules

AP-002: Simple oscillators (Last updated 9/10/2010) A hardware/software development exercise presented in the form of a tutorial diary to demonstrate process.

Module Library

These application modules are incorporated in released software products and are supported as such. You are of course invited to learn from them, adapt them to your needs, or simply employ them in your designs. Complete source code is included.

Software-Defined I/O

AP-003: SRAM Control Cluster, Mark 1 (Last updated 8/10/2011) Four nodes provide a versatile but simple interface to external SRAM that may be shared by several masters, such as our virtual machines.

Major Applications

These items describe complete applications for our chips, which may be adapted. Complete source code is included.

Virtual Machines

Automated Testing System

Raw Data

The numbers in our data sheets summarize data obtained by empirical testing. These items provide access to the raw data for the benefit of anyone wishing a deeper understanding of the summary numbers.

Characterization

Raw Characterization Data (Last updated 5/07/2011) Primary data taken on 5 chips from each of 10 wafers representing a corner split lot for process variation, with measurements of sensitivity to variation in VDD and ambient temperature.

Share
Valid XHTML 1.0 Strict